Lithographic clusters in each case comprise exposure tools such as wafer steppers or wafer scanners, and automated lines, frequently controlled by robots, for loading or unloading the exposure tools or further tools. Process stations closely associated with the relevant exposure steps are arranged along these lines. These include the resist coating, adhesion units, developer processes, cleaning steps and, in particular, hot and cool stations that bring the semiconductor substrates to be exposed or to be developed up to a temperature required for the respective process, or produce a temperature by means of which a process is effected on the semiconductor substrate. These process stations are termed hot or cool plates.
The automated process lines are required, in particular, because manual handling of the individual substrates would, for example, interrupt critical temperature steps, cause contamination or give rise to errors in time steps requiring to be observed without fail in the photolithographic process.
The hot and cool plates are used, in particular, upstream and downstream of the resist coating and developing stations.
The thermal processes that are carried out on the hot or cool plates take place, as a rule, on the basis of the transfer of heat from or to the heated hot/cool plate to the semiconductor substrate deposited on the hot or cool plate. The planar rear side of a semiconductor substrate makes contact in this case with the likewise substantially planar surface of the hot/cool plate (also simply called “plate” below). The thermal process actually is performed on the semiconductor substrate as a function of the thermal conductivity of the surface of the plate in combination with the period of action and the thermal energy fed or dissipated to or from the plate.
If a semiconductor substrate is not lying with its entire area on the hot or cool plate, the maximum contact area defined by the area of the substrate rear side is reduced. There is a diminished transfer or dissipation of heat that can, in particular in the case of critical lithography planes, have a disadvantageous effect on the structures developed in the photosensitive resist. Such a case can occur when a semiconductor substrate is deposited inaccurately on the plate because of the automatic handling on the automatic line.
A frequently occurring case consists in that semiconductor substrates are deposited, for example, on position markings in the edge region of the relevant plate, the true purpose of which markings is to permit the substrate to be correctly positioned on the plate. These position markings project somewhat on the plate, and so the semiconductor substrates rest on the position mark on one side with the edge, while they are capable of touching the heated or cooled contact surface with the other edge. The semiconductor substrate is therefore heated or cooled inhomogeneously, and so the structures formed in the resist are non-uniformly fixed.
This leads to so-called uniformity problems, that is to say differences in the structural widths of lines that were originally transferred from a mask with the same width during exposure. When this problem is recognized, the relevant wafers must be post-processed after measurement in a CD microscope measuring instrument (CD critical dimension) employing methods that consume time and material, this being so-called rework. It is to be remarked in this case that although optical, visual controls are carried out after the lithography processing of the small structural widths, it is impossible in practice to detect quality defects only with the help of simple lenses.
However, the expensive microscope measuring instrument for determining the critical dimension is used only in individual cases for the purpose of finding semiconductor substrates situated outside the process specification. Only a small number of wafers from, for example, 25 semiconductor substrates (wafers) of a batch are actually measured in accordance with statistical stipulations. It can happen in this case that the randomly measured semiconductor substrates are not even found in some circumstances. The result can therefore be that a batch affected by quality defects will leave the lithographic process area without detection of the defect, and be subjected to a subsequent process step. In this case, no more post-processing would be possible, resulting in a high loss in yield.
One proposed solution consists in using a sensor, for example, to measure the temperature of the hot or cool plate at regular, short time intervals, and thus to track the temporal temperature profile while a semiconductor substrate is being laid on a plate. Because of the different temperature, when a substrate is laid down there is firstly a temperature jump in the plate. Given ideal contact, that is to say correct positioning by the automatic handling system, a large temperature jump is to be expected because of the optimum heat transfer. As a rule, a cool or hot plate is connected to a source of heat or cold in such a way that a control loop achieves restitution of the desired temperature as quickly as possible. Consequently, a second counter-excursion takes place, for example after the first temperature jump owing to the laying down of the semiconductor substrate. This excursion overcompensates the first temperature jump, and so the substrate quickly reaches its desired temperature.
The result is a characteristic temperature profile. This is measured for the case of an ideal contact over the entire surface and stored as reference. Thereafter, each current heating or cooling process can be measured likewise and compared with the stored reference. If the two temperature profiles differ from one another beyond a predefined limiting value, an error code is generated that can be used as index for the tilted position of a semiconductor substrate on the hot or cool plate. It is thereby still possible to intervene in the lithographic cluster from outside during processing, and to post-process the substrate with an outlay that is now still low.
A disadvantage of this approach to the solution consists in that reliable detection of the tilted position of semiconductor substrates necessarily requires a learning cycle because of the non-trivial temperature profile. To date, it has been possible to apply appropriate software only on the hot plate side of a combined cool/hot plate arrangement (CHP, Cool/Hot Plate).
A tilted position on the associated cool plate side has continued to be undetected, by contrast. In addition, the method in accordance with the prior art is a function of the desired temperature of the cool or hot plate and also, for example, of the diameter of the semiconductor substrate respectively used. The flexibility of such a method is therefore limited, and must be readjusted for the respective application.